5G and the next generation 6G when launched require strict synchronization within the telecommunication network to sustain the functionalities, especially for eMBB (enhances mobile broadband) and URLLC (Ultra Reliability and Low Latency Communication).

IEE-1588v2 protocol and Synchronous Ethernet are two key solutions to deliver the clock accuracy from UTC (Universal Time Coordinated) to each Stratum level in a synchronous hierarchy.  JTSxxCS performs a compliant holdover capability, ±0.37ppm over 24 hours, allowing the clock integrity to be maintained for at least as long as the Stratum 3 standard clock requires when the timing signal of master sources are not available.

 Ethernet are two essential solutions to deliver the clock accuracy from UTC to each Stratum level in a synchronous hierachy.

JTSxxCS performs a compliant holdover capability letting the clock integrity be kept up for at least as long as the Stratum 3 standard clock when the timing signal of master sources absents.

• Compliance with ITU-T G.8262 Options 1 & 2 and Stratum 3 in GR-1244 Core & CR-253-Core.
• Free-run frequency stability of +/-4.6ppm including 20-year aging
• 24-hour holdover stability of +/-0.37ppm with temperature variation
• Frequency stability of ±280ppb available
• Operating temperature range as wide as -40 to 85°C
• Short term frequency stability (ADEV) of 0.1ppb typ at τ = 1 sec
• Phase noise as low as -148 dBc/Hz typ. at 100kHz offset
• Supply voltage ranges from 1.8V up to 3.3V
• Current consumption as low as 3mA max with clipped sinewave output
• Frequency range 9.6MHz to 50MHz
• Various tuning options available